• The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for...
    10 KB (1,167 words) - 12:37, 3 May 2025
  • page table entry as a no-execute or "NX" bit, indicating that code cannot be executed from the associated page. The NX feature is also available in protected...
    29 KB (3,295 words) - 03:11, 9 January 2025
  • cause an exception. It relies on hardware features such as the NX bit (no-execute bit), or on software emulation when hardware support is unavailable...
    20 KB (2,759 words) - 09:06, 4 May 2025
  • Enhanced 3DNow!, NX bit MMX, SSE, SSE2, Enhanced 3DNow!, NX bit MMX, SSE, SSE2, Enhanced 3DNow!, NX bit MMX, SSE, SSE2, Enhanced 3DNow!, NX bit MMX, SSE, SSE2...
    89 KB (3,528 words) - 21:59, 8 May 2024
  • Thumbnail for List of Intel Pentium processors
    64-bit Core microarchitecture. All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation)...
    101 KB (3,933 words) - 19:46, 3 February 2025
  • Thumbnail for Athlon 64
    Athlon 64 (category 64-bit microprocessors)
    could be used by people worried about damaging the die. The No Execute bit (NX bit) supported by Windows XP Service Pack 2 and future versions of Windows...
    52 KB (5,383 words) - 16:17, 3 April 2025
  • Thumbnail for List of Intel Core processors
    SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel Active Management Technology (iAMT2)a Die size:...
    497 KB (14,114 words) - 22:57, 23 April 2025
  • had introduced to the Windows product line, including eliminating the 16-bit memory access limitations of earlier Windows releases such as Windows 3.1...
    63 KB (5,212 words) - 22:30, 12 May 2025
  • MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64, Cool'n'Quiet All models support: MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64, Cool'n'Quiet All models...
    41 KB (696 words) - 12:26, 17 March 2025
  • Thumbnail for List of Intel Celeron processors
    Intel 64, XD bit (an NX bit implementation) Steppings: A1 All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation)...
    152 KB (4,647 words) - 00:58, 15 April 2025
  • Thumbnail for X86-64
    are not standard features of the architecture. No-Execute bit The No-Execute bit or NX bit (bit 63 of the page table entry) allows the operating system...
    120 KB (12,070 words) - 12:54, 14 May 2025
  • disabled All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation), Intel VT-x All models support uni-processor configurations...
    44 KB (877 words) - 10:18, 25 July 2024
  • support: MMX, SSE, SSE2, Enhanced 3DNow!, NX bit All models support: MMX, SSE, SSE2, Enhanced 3DNow!, NX bit SSE3 supported by: all models with an OPN...
    28 KB (861 words) - 14:45, 18 January 2025
  • APU features table All models support: MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64 All models with OPN ending in AG support up to Registered PC2700...
    87 KB (2,159 words) - 02:56, 5 December 2024
  • microprocessors. All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation), Hyper-Threading Transistors: 47 million Die size: 25...
    86 KB (3,203 words) - 09:25, 30 December 2024
  • controller, the HyperTransport link, and AMD's "NX bit" feature. In the second half of 2005, AMD added 64-bit support (AMD64) to the Sempron line. Some journalists...
    17 KB (1,354 words) - 14:22, 22 March 2025
  • NX bit, AMD64, Cool'n'Quiet, AMD-V Models: Sempron 130-150 Two AMD K10 cores ISA extensions: MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, SSE4a, ABM, NX bit...
    78 KB (5,521 words) - 02:03, 29 March 2025
  • Thumbnail for Athlon 64 X2
    speed, per core MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit Socket 939, HyperTransport (1000 MHz, HT1000) VCore: 1.35–1.4 V Power use...
    15 KB (1,499 words) - 22:09, 19 January 2025
  • All models support: MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, Cool'n'Quiet, AMD-V Memory support: DDR2 SDRAM up to PC2-8500 Chip...
    40 KB (1,103 words) - 22:22, 25 September 2024
  • 1024 kb (full speed) Instruction sets: MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64 FX-51 (2.2 GHz) and FX-53 (2.4 GHz) Socket 939 L1 cache: 64 kb +...
    19 KB (964 words) - 13:14, 13 May 2025
  • Thumbnail for AMD Turion
    KiB, full speed MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit Socket 754, HyperTransport (800 MHz, HT800) VCore: 0.8 V - 1.2 V for ML...
    21 KB (2,288 words) - 00:58, 15 April 2025
  • NX may refer to: Northern Exposure, a 1990s TV show turned cable NX bit, a term for marking parts of computer memory as "no execute" NX technology, a...
    2 KB (250 words) - 18:57, 15 June 2024
  • support: MMX, SSE, SSE2, SSE3 Intel 64: supported by 5x6, 511 and 519K XD bit (an NX bit implementation): supported by 5x5J, 5x6, 511, 519J and 519K Transistors:...
    52 KB (1,159 words) - 02:02, 28 January 2025
  • All models support: MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, Cool'n'Quiet, AMD-V, Turbo Core (AMD equivalent of Intel Turbo Boost)...
    30 KB (1,439 words) - 15:52, 8 May 2025
  • Thumbnail for X86
    also introduced the NX bit, which offers some protection against security bugs caused by buffer overruns. As a result of AMD's 64-bit contribution to the...
    105 KB (10,776 words) - 12:49, 18 April 2025
  • Thumbnail for Memory management unit
    enabled, to support 57-bit linear addresses. In all levels of the page table, the page table entry includes an NX bit. 48-bit linear addresses are divided...
    49 KB (7,099 words) - 18:50, 8 May 2025
  • Thumbnail for Athlon X4
    AVX(1, 1.1), XOP, FMA(4, 3), CVT16, F16C, BMI(ABM, TBM), Turbo Core 3.0, NX bit PowerNow! Socket FM2+, support for PCIe 3.0 Two or four CPU cores based...
    12 KB (327 words) - 22:02, 9 March 2024
  • Thumbnail for Pentium 4
    Pentium 4 (category 32-bit microprocessors)
    F. The E0 revision also adds eXecute Disable (XD) (Intel's name for the NX bit) to Intel 64. Intel's official launch of Intel 64 (under the name EM64T...
    45 KB (5,342 words) - 09:57, 17 March 2025
  • option MMX, Extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, AMD-V Socket AM3, HyperTransport with 2 GHz Die Size: 117 mm² Power consumption...
    8 KB (663 words) - 21:45, 19 January 2025
  • SSE4.2, AVX, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), TXT, Intel VT-x, Intel EPT, Intel VT-d, Hyper-threading...
    25 KB (336 words) - 20:09, 15 April 2024