Precision Architecture RISC (PA-RISC) or Hewlett Packard Precision Architecture (HP/PA or simply HPPA), is a general purpose computer instruction set...

LoongArch, Motorola 88000, the MIPS architecture, PA-RISC, Power ISA, RISC-V, SuperH, and SPARC. RISC processors are used in supercomputers, such as the...

The PA-8000 (PCX-U), code-named Onyx, is a microprocessor developed and fabricated by Hewlett-Packard (HP) that implemented the PA-RISC 2.0 instruction...

Translation lookaside buffer (TLB) entries and page table entries in PA-RISC 1.1 and PA-RISC 2.0 support read-only, read/write, read/execute, and read/write/execute...

Berkeley RISC is one of two seminal research projects into reduced instruction set computer (RISC) based microprocessor design taking place under the Defense...

development of a new RISC processor, which emerged as the PA-RISC platform. The HP 3000 CPU was reimplemented as an emulator running on PA-RISC and a recompiled...

proprietary FOCUS architecture, and later HP 9000 Series models based on HP's PA-RISC instruction set architecture. HP-UX was the first Unix to offer access-control...

Hewlett-Packard PA-RISC, which are associated with virtual addresses, and which allow multiple keys per process. In the Itanium and PA-RISC architectures...

FOCUS designs. From the mid-1980s, the line was transitioned to HP's new PA-RISC architecture. Finally, in the 2000s, systems using the IA-64 were added...

ported to PA-RISC- and SPARC-based platforms, for a total of four versions: NeXTSTEP/NeXT (for NeXT's own hardware), NeXTSTEP/Intel, NeXTSTEP/PA-RISC, and...

RISC in Wiktionary, the free dictionary. RISC is an abbreviation for reduced instruction set computer. RISC or Risc may also refer to: Berkeley RISC Classic...

PowerPC 32/64 and VLE MIPS 16/32/64 MicroMIPS 68xxx Java and DEX bytecode PA-RISC RISC-V eBPF BPF Tricore PIC 12/16/17/18/24 SPARC 32/64 CR16C Z80 6502 MC6805/6809...

introduced and Debian was ported to the following architectures: IA-64, PA-RISC (hppa), mips and mipsel and IBM ESA/390 (s390). Point releases: 3.0r1 (16 December...

in desktop software. Hewlett-Packard introduced MAX instructions into PA-RISC 1.1 desktops in 1994 to accelerate MPEG decoding. Sun Microsystems introduced...

DECstation, Data General AViiON, HP 9000 Series 300, Multimax, NeXT, PA-RISC, RS/6000, Sequent Symmetry, SGI IRIS, Sun-3, Sun-4 and others. Occam MPD...

Motorola 68000 family based NeXT computers, Intel x86, Sun SPARC, and HP PA-RISC-based systems. NeXT separated the underlying operating system from the...

there to RISC-V International, a Swiss non-profit entity, in November 2019. Similar to several other RISC ISAs, e.g. Amber (ARMv2) or OpenRISC, RISC-V is...

classic VLIW. HP intended to use these features in PA-WideWord, the planned successor to their PA-RISC ISA. EPIC was intended to provide the best balance...

The following is a partial list of products manufactured under the Hewlett-Packard brand. HP categories of printers as of November 2014 are: Black and...

to run on 32-bit Intel x86-based "IBM-compatible" personal computers, PA-RISC-based workstations from Hewlett-Packard, and SPARC-based workstations from...

eXtensions or MAX are instruction set extensions to the Hewlett-Packard PA-RISC instruction set architecture (ISA). MAX was developed to improve the performance...

Executable Format) Haiku, an open source reimplementation of BeOS RISC OS Stratus VOS, in PA-RISC and x86 versions SkyOS Fuchsia OS Z/TPF HPE NonStop OS Deos...

Runway bus is a front-side bus developed by Hewlett-Packard for use by its PA-RISC microprocessor family. The Runway bus is a 64-bit wide, split transaction...

of parallel computing machines were based on the Hewlett-Packard (HP) PA-RISC microprocessors, and in 1995, HP bought the company. Exemplar machines...

released a port of OSF/1 to the early HP 9000/700 workstations based on the PA-RISC 1.1 architecture. This was withdrawn soon afterwards due to lack of software...

to 32 sockets (up to 128 cores) and 4 TB of memory. The Superdome used PA-RISC processors when it debuted in 2000. Since 2002, a second version of the...

The PA-7100 is a microprocessor developed by Hewlett-Packard (HP) that implemented the PA-RISC 1.1 instruction set architecture (ISA). It is also known...

The PA-7200 – also known as PCX-T', code-named Thunderbird' –, is a microprocessor that implements the PA-RISC 1.1 instruction set architecture (ISA) developed...

the link register, OpenRISC uses register r9, and SPARC uses "output register 7" or o7. In some others, such as PA-RISC, RISC-V, and the IBM System/360...

and later versions were known as TurboIMAGE, and TurboIMAGE/XL after the PA-RISC migration. IMAGE is based on the network database model, in contrast to...