Transactional Synchronization Extensions (TSX), also called Transactional Synchronization Extensions New Instructions (TSX-NI), is an extension to the...
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commercial server to include transactional memory processor instructions Intel's Transactional Synchronization Extensions (TSX), available in select Haswell-based...
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Advanced Synchronization Facility (ASF) is a proposed extension to the x86-64 instruction set architecture that adds hardware transactional memory support...
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Compare-and-swap (section Extensions)
transactional memory present in some recent processors such as IBM POWER8 or in Intel processors supporting Transactional Synchronization Extensions (TSX)...
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thread while the lock spins waiting. Transactional Synchronization Extensions and other hardware transactional memory instruction sets serve to replace...
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instructions, for Intel Transactional Synchronization Extensions, both RTM and HLE and initial support for Hardware Transactional Memory on POWER. RISC-V...
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E7-88xx v3 series also contain functional bug-free support for Transactional Synchronization Extensions (TSX), which was disabled via a microcode update in August...
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Concurrency control (category Transaction processing)
system Software transactional memory – Concurrency control mechanism in software Transactional Synchronization Extensions – Extension to the x86 instruction...
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Haswell (microarchitecture) (category Transactional memory)
between the two threads that each core can service. Intel Transactional Synchronization Extensions (TSX) for the Haswell-EX variant. In August 2014 Intel...
109 KB (4,974 words) - 13:06, 17 December 2024
Management Extensions (JMXTM) Specification JSR 255: JavaTM Management Extensions (JMXTM) Specification, version 2.0 JSR 160: JavaTM Management Extensions (JMX)...
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Skylake (microarchitecture) (category Transactional memory)
Intel Memory Protection Extensions (MPX) Intel Software Guard Extensions (SGX) Intel Transactional Synchronization Extensions (Disabled in 2021) Intel...
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ensuring atomicity. An example of HTM in practice are the Transactional Synchronization Extensions. With the help of locks, operations trying to concurrently...
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Broadwell (microarchitecture) (category Transactional memory)
feature aimed at making it harder to exploit software bugs. Transactional Synchronization Extensions (except for Broadwell-Y due hardware bug) FP multiplication...
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Alternatives to locking include non-blocking synchronization methods, like lock-free programming techniques and transactional memory. However, such alternative methods...
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AArch64 (redirect from Scalable vector extension)
SVE2. Transactional Memory Extension (TME). Following the x86 extensions, TME brings support for Hardware Transactional Memory (HTM) and Transactional Lock...
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File system (redirect from Transactional file system)
research prototypes of transactional file systems for UNIX systems, including the Valor file system, Amino, LFS, and a transactional ext3 file system on...
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code), Saint Helena Hardware Lock Elision, part of Intel's Transactional Synchronization Extensions High-level emulation, an emulator for the Nintendo 64 HLE...
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exchanges including the Toronto Stock Exchange Transactional Synchronization Extensions, an extension to the x86 instruction set architecture Mubami language...
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(shared storage qualifier) with thread-local parts (normal variables) Synchronization primitives and a memory consistency model Explicit communication primitives...
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service that performs synchronization for the user at opportune times such as logon and offline to online transitions. Synchronization does not occur continuously...
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Load-link/store-conditional (category Transactional memory)
JDK CAS-based skip list implementation. Non-blocking synchronization Read–modify–write Transactional memory "S-1 project". Stanford Computer Science wiki...
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HSQLDB (section Transaction support)
performance. The HSQLDB engine loads them only partially and synchronizes the data to the disk on transaction commits. However, the engine always loads all rows...
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fundamental core functionalities. Extensions to the core functionalities of the MMU and FPU may be considered CPU extensions however. The supplementary instructions...
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CPUID (redirect from Indirect branch control extension)
on May 11, 2023 "Performance Monitoring Impact of Intel Transactional Synchronization Extension Memory Ordering Issue" (PDF). Intel. June 2023. p. 8. Retrieved...
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Rock (processor) (category Transactional memory)
2008, Sun engineers presented the transactional memory interface at Transact 2008, and the Adaptive Transactional Memory Test Platform simulator was...
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more expressive hardware transactional memory. IBM POWER8 and Intel Intel TSX provide working implementations of transactional memory. Sun's cancelled...
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level threads, usually one per processor core. The software transactional memory (STM) extension to Glasgow Haskell Compiler (GHC) reuses the process forking...
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RISC-V (section ISA base and extensions)
between extensions for readability, for example RV32I2_M2_A2. The base, extended integer & floating-point calculations, with synchronization primitives...
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Commit (data management) (category Transaction processing)
became an effective solution for distributed transaction management, successfully managing data synchronization problems between multiple nodes. However,...
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library for teaching, and as a base for future extensions. The committee expressly welcomed creating extensions and variants of Haskell 98 via adding and incorporating...
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