• In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or...
    35 KB (4,329 words) - 19:12, 27 June 2025
  • An Advanced Encryption Standard instruction set (AES instruction set) is a set of instructions that are specifically designed to perform AES encryption...
    26 KB (2,215 words) - 14:42, 13 April 2025
  • MMX is a single instruction, multiple data (SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997 with its Pentium P5 (microarchitecture)...
    15 KB (1,452 words) - 07:01, 28 January 2025
  • Thumbnail for Reduced instruction set computer
    a reduced instruction set computer (RISC) (pronounced "risk") is a computer architecture designed to simplify the individual instructions given to the...
    62 KB (7,270 words) - 23:22, 6 July 2025
  • Thumbnail for ARM architecture family
    RISC Machines and originally Acorn RISC Machine) is a family of RISC instruction set architectures (ISAs) for computer processors. Arm Holdings develops...
    143 KB (13,766 words) - 08:44, 21 July 2025
  • A SHA instruction set is a set of extensions to the x86 and ARM instruction set architecture which support hardware acceleration of Secure Hash Algorithm...
    3 KB (274 words) - 10:48, 22 February 2025
  • No instruction set computing (NISC) is a computing architecture and compiler technology for designing highly efficient custom processors and hardware...
    9 KB (917 words) - 02:42, 8 June 2025
  • A complex instruction set computer (CISC /ˈsɪsk/) is a computer architecture in which single instructions can execute several low-level operations (such...
    16 KB (2,109 words) - 22:17, 28 June 2025
  • The FMA instruction set is an extension to the 128- and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform...
    19 KB (1,395 words) - 13:44, 19 July 2025
  • The x86 instruction set refers to the set of instructions that x86-compatible microprocessors support. The instructions are usually part of an executable...
    264 KB (14,984 words) - 21:36, 16 July 2025
  • An instruction set architecture (ISA) is an abstract model of a computer, also referred to as computer architecture. A realization of an ISA is called...
    34 KB (1,849 words) - 19:41, 3 July 2025
  • Carry-less Multiplication (CLMUL) is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in...
    6 KB (492 words) - 03:05, 13 May 2025
  • Bit manipulation instructions sets (BMI sets) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD. The purpose...
    19 KB (1,437 words) - 22:16, 16 July 2025
  • Visual Instruction Set, or VIS, is a SIMD instruction set extension for SPARC V9 microprocessors developed by Sun Microsystems. There are five versions...
    4 KB (429 words) - 22:15, 16 April 2025
  • In computer engineering, an orthogonal instruction set is an instruction set architecture where all instruction types can use all addressing modes. It...
    21 KB (3,017 words) - 05:34, 20 April 2025
  • Operations) instruction set, announced by AMD on May 1, 2009, is an extension to the 128-bit SSE core instructions in the x86 and AMD64 instruction set for the...
    20 KB (1,448 words) - 04:33, 31 August 2024
  • A one-instruction set computer (OISC), sometimes referred to as an ultimate reduced instruction set computer (URISC), is an abstract machine that uses...
    31 KB (3,772 words) - 07:22, 25 May 2025
  • An instruction set simulator (ISS) is a simulation model, usually coded in a high-level programming language, which mimics the behavior of a mainframe...
    14 KB (1,891 words) - 02:56, 24 June 2024
  • Minimal instruction set computer (MISC) is a central processing unit (CPU) architecture, usually in the form of a microprocessor, with a very small number...
    12 KB (1,412 words) - 10:29, 27 May 2025
  • Thumbnail for Machine code
    optional support of the PDP-11 instruction set; the IA-64 architecture, which includes optional support of the IA-32 instruction set; and the PowerPC 615 microprocessor...
    38 KB (3,880 words) - 06:47, 21 July 2025
  • logic units (ALUs), central processing units (CPUs), and software instruction sets. In ALUs, the opcode is directly applied to circuitry via an input...
    17 KB (1,169 words) - 22:24, 15 July 2025
  • Thumbnail for Zilog Z80
    register, the Z80 introduced an alternate register set, two 16-bit index registers, and additional instructions, including bit manipulation and block copy/search...
    118 KB (12,641 words) - 17:10, 15 June 2025
  • The Alternate Instruction Set (AIS) is a second 32-bit instruction set architecture found in some x86 CPUs made by VIA Technologies. On these VIA C3 processors...
    11 KB (1,002 words) - 05:08, 31 August 2024
  • The Burroughs B6x00-7x00 instruction set includes the set of valid operations for the Burroughs B6500, B7500 and later Burroughs large systems, including...
    29 KB (4,040 words) - 08:21, 8 May 2023
  • Interlocked Pipelined Stages) is a family of reduced instruction set computer (RISC) instruction set architectures (ISA): A-1 : 19  developed by MIPS Computer...
    70 KB (8,083 words) - 08:05, 18 July 2025
  • The Atmel AVR instruction set is the machine language for the Atmel AVR, a modified Harvard architecture 8-bit RISC single chip microcontroller which...
    42 KB (2,722 words) - 08:58, 17 May 2025
  • Thumbnail for Datapoint 2200
    (processor)'s instruction set became the basis of the Intel 8008 instruction set, which inspired the Intel 8080 instruction set and the x86 instruction set used...
    24 KB (1,657 words) - 02:01, 26 June 2025
  • instruction set, or simply compressed instructions, are a variation on a microprocessor's instruction set architecture (ISA) that allows instructions...
    13 KB (1,795 words) - 02:25, 28 February 2025
  • RISC-V (category Instruction set architectures)
    "risk-five"): 1  is a free and open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. Unlike proprietary...
    152 KB (15,814 words) - 12:12, 21 July 2025
  • extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first...
    85 KB (4,667 words) - 21:58, 16 July 2025