Northbridge (computing) (redirect from Memory Controller Hub)
In computing, a northbridge (also host bridge, or memory controller hub) is a microchip that comprises the core logic chipset architecture on motherboards...
11 KB (1,289 words) - 20:07, 31 May 2025
A memory controller, also known as memory chip controller (MCC) or a memory controller unit (MCU), is a digital circuit that manages the flow of data going...
12 KB (1,385 words) - 13:03, 12 July 2025
'memory controller hub' and an 'I/O controller hub', which tend to be called 'north bridge' and 'south bridge' respectively. The memory controller hub...
31 KB (1,437 words) - 08:46, 27 May 2025
processors, the integrated memory controller (IMC) is an entire northbridge (some even having GPUs), and the PCH (Platform Controller Hub) acts as a southbridge...
133 KB (6,033 words) - 17:36, 25 July 2025
I/O Controller Hub (ICH) is a family of Intel southbridge microchips used to manage data communications between a CPU and a motherboard, specifically Intel...
19 KB (2,077 words) - 17:41, 25 July 2025
It uses a memory controller hub (MCH) that is connected to an I/O controller hub (ICH) via a 266 MB/s bus. The MCH chip supports memory and AGP (replaced...
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Front-side bus (section Memory)
typically carry data between the central processing unit (CPU) and a memory controller hub, known as the northbridge. Depending on the implementation, some...
20 KB (1,820 words) - 19:44, 25 July 2025
between this new central hub and the CPU compared to the previous architecture: some northbridge functions, the memory controller and PCIe lanes, were integrated...
34 KB (3,032 words) - 02:20, 13 December 2024
the processor with a dedicated northbridge chip, called the memory controller hub or I/O hub. The Lynnfield series of processors does not include built-in...
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Corporation Memory Controller Hub, another name for the Northbridge or host bridge, a microchip on some PC motherboards MicroTCA Carrier Hub, a component...
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released in November 2000. It consists of an 82850 memory controller hub and an 82801BA I/O controller hub. This chipset outperforms the AMD 760 chipset with...
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Intel 82Q965, 82Q963, 82G965 Graphics and Memory Controller Hub (GMCH) and Intel 82P965 Memory Controller Hub (MCH) Intel Santa Rosa Does Not Support DDR2-800...
33 KB (1,884 words) - 22:17, 25 April 2025
List of AMD chipsets (redirect from Fusion controller hub)
northbridge and southbridge. The Fusion Controller Hubs are similar in function to Intel's Platform Controller Hub. AMD's FCH has been discontinued since...
39 KB (2,482 words) - 12:06, 3 June 2025
Hub Architecture to increase the bandwidth available between a network card and the CPU. It directly connected the network controller to the Memory Controller...
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Express (PCIe). The X58 is not a memory controller hub (MCH), because it has no memory interface, so Intel calls it an I/O hub. This should not be confused...
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NVM Express (NVMe) or Non-Volatile Memory Host Controller Interface Specification (NVMHCIS) is an open, logical-device interface specification for accessing...
61 KB (5,513 words) - 04:51, 20 July 2025
Retrieved 2017-08-07. Intel 830 Chipset Family: 82830 Graphics and Memory Controller Hub (GMCH-M) Datasheet, Order Number 298338-003, January 2002 (section...
86 KB (3,046 words) - 04:29, 18 July 2025
audio The hub design consisted of three chips, including the Graphics & Memory Controller Hub (GMCH), I/O Controller Hub (ICH), and the Firmware Hub (FWH)...
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Advanced Host Controller Interface (AHCI) Non-Volatile Memory Host Controller Interface (NVMHCI) Wireless USB (WHCI 1.0) RAID Controller Host adapter LPCIO...
9 KB (1,054 words) - 00:22, 26 March 2025
an Intel GMCH (Graphics Memory Controller Hub) featuring its own in-built graphics controller (complete memory hub controller and graphics accelerator...
38 KB (4,275 words) - 05:53, 14 July 2025
Intel's processor chipsets since 2008. It is located in the Platform Controller Hub of modern Intel motherboards. The Intel Management Engine always runs...
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functionality of northbridge and southbridge between the CPU and Platform Controller Hub (PCH), I/O virtualization was not performed by the CPU but instead by...
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either the storage interface controller on CPU or chipset, the flash memory controller on solid state drive, or the disk controller on hard disk drive. In history...
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Thermal and Mechanical Design Guidelines – For the Intel 82X38 Memory Controller Hub (MCH). September 2007, Revision -001" (PDF)., page 14 (2.38 MB)...
56 KB (5,257 words) - 23:01, 25 April 2024
from the original on May 28, 2012. Retrieved November 20, 2011. P45 Express Chipset 82P45 Memory Controller Hub Intel P45 Express Chipset Overview v t e...
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support. Intel Fast Memory Access Updated Memory Controller Hub (MCH) to increase performance and reduce latency. Dual channel DDR2 memory Up to 12.8 GB/s...
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Corporation Northbridge (computing) - Integrated video controllers also known as Graphics and Memory Controller Hub. This disambiguation page lists articles associated...
471 bytes (82 words) - 06:03, 19 October 2016
Host Controller Interface (xHCI) is a technical specification that provides a detailed framework for the functioning of a computer's host controller for...
19 KB (2,764 words) - 08:53, 27 May 2025
the Memory Controller Hub (MCH) layout. With the newer Intel architectures (Intel 5 Series onwards), ME is included into the Platform Controller Hub (PCH)...
62 KB (6,360 words) - 09:05, 27 May 2025
Intel referred to its southbridge as the I/O Controller Hub (ICH), later replaced by the Platform Controller Hub (PCH), which connected directly to the CPU...
9 KB (928 words) - 22:25, 7 June 2025