Cross-coupled LC oscillator

Schematic of a cross-coupled LC oscillator using n-MOSFETs (M1 and M2) as differential transconductor.

The cross-coupled LC oscillator is a type of electronic oscillator that employs a pair of cross-coupled electronic active devices—typically metal-oxide-semiconductor field-effect transistors (MOSFETs) or bipolar junction transistors (BJTs)—and a resonant LC filter, commonly referred to as a tank, which stores and exchanges energy between the inductor and the capacitor. The cross-coupled devices act as differential transconductor to compensate the losses of the LC network and sustain an autonomous oscillation.[1][2]

This topology provides a differential output signal and it is widely used to generate sinusoidal signals in the radio frequency (RF) range, from hundreds of megahertz up to hundreds of gigahertz, particularly in integrated circuits (ICs) that implement entire frequency synthesizers, transmitters, or receivers on a single semiconductor die. [3]

Operating principle

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A parallel LC circuit can naturally generate a sinusoidal signal at its resonance frequency:

In an ideal lossless case, the oscillation would persist indefinitely. In practice, however, parasitic resistances in the reactive elements dissipate energy cycle after cycle, causing the amplitude to decay and the oscillation to eventually cease. Such losses can be represented by an equivalent resistance placed in parallel with the LC network. [4]


To maintain a stable oscillation over time, these losses must be offset by supplying energy to the resonator. A common approach is to place a transconductance element in a positive feedback configuration. In this topology, the transconductor senses the instantaneous voltage across the resonator and generates a current proportional to the transconductance Gm, injecting energy back into the tank [4].

Feedback model of an LC oscillator

For sustained oscillation to occur, two fundamental conditions must be satisfied—commonly referred to as the Barkhausen criteria, leading to the conditions[4]:

These conditions ensure that the signal regenerates constructively at each cycle. In the start-up phase, the loop gain must be strictly greater than one to allow small perturbations, such as thermal noise, to grow. As the oscillation builds up, nonlinearities in the active device reduce the effective gain to unity, stabilizing the amplitude at a steady value. [4][5]

MOSFET and bipolar based transconductor

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Cross-coupled LC oscillator with current bias with MOSFET (left) and BJT (right) based transconductor

In integrated circuits, the most commonly used active devices for implementing the transconductance stage are MOSFETs and BJTs. In cross-coupled oscillators, at least two transistors are connected in a cross-coupled configuration to establish positive feedback, effectively generating a negative resistance that compensates for the tank losses. The equivalent transconductance at the start-up is equal to gm​/2, where gm​ is the transconductance of each transistor. For MOSFET based transconductor gm=2Ibias/(Vgs-Vt), in which Ibias is the bias current, Vgs the voltage between gate and source and Vt the threshold voltage of the MOSFET. For bipolar based transconductor gm=Ibias/Vthermal in which Ibias is the bias current while Vthermal is the thermal voltage. [4]

Phase noise

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The phase noise of an LC oscillator can be described by a theoretical model first proposed by Leeson: [6]

where k is Boltzmann’s constant, T is the absolute temperature in Kelvin, A0​ is the differential oscillation amplitude across the tank, R0​ models the tank losses, C is the tank capacitance, and ωm​ is the frequency offset. The factor F, called excess noise factor, accounts for the phase noise introduced by the transconductance stage and depends on the specific topology and technology used [5].

Leeson's model provides useful results but does not capture the mechanisms by which transistor electronic noise is converted into phase noise. To account for this, it is necessary to adopt approaches that consider the time-varying nature of the oscillator, such as the Impulse Sensitivity Function (ISF) method.[7]

Figure of merit and efficiency

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Phase noise is not the only figure of interest in an LC oscillator. The power consumption required to achieve a given phase noise level is also a critical parameter. A commonly used figure of merit (FoM) captures this trade-off and is expressed as:

where denotes the phase noise at an offset frequency ωm​, PDC​ is the power consumption, and ω0​ is the oscillation frequency. By rearranging the expression, the figure of merit can also be written in terms of key oscillator design parameters, such as the tank quality factor Q, the excess noise factor F, and the efficiency η. [5]

The overall efficiency η can be expressed as the product of current efficiency ηI​ and voltage efficiency ηV​. The current efficiency ηI​ is defined as the ratio between the current injected into the tank at the oscillation frequency and the total current drawn from the supply. The voltage efficiency ηV​ is defined as the ratio between the single-ended oscillation amplitude (e.g., A0​/2) and the supply voltage. Both F and η depend on the technology and on the specific topology of the cross-coupled oscillator being used. [5][8]

CMOS cross-coupled oscillators

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In CMOS technology, the most common cross-coupled LC oscillator topologies use either a single or a dual transconductor to provide the negative resistance required to sustain oscillation. In the single-transconductor configuration, one pair of MOSFETs injects current into the tank during only half of the oscillation cycle. This kind of operation is usually referred as class B. In the dual-transconductor configuration—often referred to as complementary class B—nMOS and pMOS transistors are arranged symmetrically to alternately source and sink current, generating a differential square-wave current.

Single transconductor cross-coupled LC oscillator with nmos transistors (left) and complementary transconductor cross-coupled LC oscillator with nmos and pmos transistors (right). Both topologies have an nmos current bias.

In the single-transconductor configuration, the current efficiency is ηI​=2/π≈0.64. Thanks to the complementary transconductor it increases to ηI​=4/π≈1.27 in the complementary configuration.

As for the voltage efficiency ηV​, it is limited by the voltage headroom required by the bias transistor. In a single nMOS configuration ηV​ typically reaches up to 0.66, while in the complementary case it is reduced to around 0.4 due to the voltage headroom required by the complementary structure. The overall efficiency η is approximately 0.5 in the complementary configuration, while it is slightly lower in the single-transconductor case, where it reaches about 0.42. [9][10]

The excess noise factor of both single and complementary transconducor is equal to:

In which is the excess noise factor of the single transconductor topology, is excess noise factor of the complementary transconductor topology, is a parameter dependent on the region of operation of the MOSFETs (typically below 2) while is the current generator transconductance. [11]

Advanced topologies

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Various techniques can be employed to reduce the excess noise factor and/or increase the efficiency of the oscillator, with the goal of improving its phase noise performance and overall figure of merit.[5][9]

LC tail filtering

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Single (left) and complementary (right) transconductor cross-coupled LC oscillator with LC tail filtering and filter capacitance for bias transistor

LC tail filtering is a technique employed in both single- and complementary-transconductor oscillator topologies. It decouples the source voltage of the transistors from the supply, which improves the voltage efficiency. Additionally, it enables the insertion of a capacitor to filter out noise injected by the current source, thereby reducing the excess noise factor.[12][13]

In complementary topologies, this approach can increase the overall efficiency up to approximately 0.8, compared to about 0.5 in configurations without tail filtering. [9]

Class C CMOS oscillator

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In a class C oscillator, the transistors operate in saturation (e.g. drain-to-source voltage is higher than gate-to-source voltage minus threshold voltage for nMOS), and a capacitor is placed in parallel with the current source to enable more effective current injection into the tank. It allows the current efficiency ηI​ to approach 1 in a single-transconductor topology. However, operation in saturation limits the maximum achievable oscillation amplitude, i.e. the voltage efficiency. [14] Despite this limitation, the overall efficiency can reach approximately 0.77. [10]

Class D CMOS oscillator

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In a class D oscillator, the transistors operate as switches, leveraging the advantages of CMOS technology scaling. This mode of operation enables a single-ended oscillation amplitude that can exceed the supply voltage by a factor of approximately three, resulting in a voltage efficiency ηV​ of about 3.[15] Consequently, the overall efficiency can reach approximately 0.82.[9]

Transformer-based CMOS oscillator

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Firstly introduced in the class C oscillator, the use of transformers in cross-coupled oscillators implemented in CMOS technology enables the introduction of gain between the drain and gate nodes of the transistors. A properly designed transformer can provide a voltage gain greater than one between its primary side (connected to the drains of the transistors) and its secondary side (connected to the gates). As a result, the gate waveforms are amplified, leading to a reduction in the noise injection from the transistors. This technique has been shown to reduce the excess noise factor due to the transconductor by a factor approximately equal to the gain introduced between these nodes. [16][17][18]

See also

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References

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  1. ^ Andreani, Pietro; Bevilacqua, Andrea (2021). "Harmonic Oscillators in CMOS—A Tutorial Overview". IEEE Open Journal of the Solid-State Circuits Society. 1: 2–17. doi:10.1109/OJSSCS.2021.3109854. ISSN 2644-1349.
  2. ^ Razavi, Behzad (2012). RF microelectronics. The Prentice Hall communications engineering and emerging technologies series (2nd ed.). Upper Saddle River, NJ Munich: Prentice Hall. p. 511. ISBN 978-0-13-713473-1.
  3. ^ Abidi, Asad A.; Murphy, David (2025). "How to Design a Differential CMOS LC Oscillator". IEEE Open Journal of the Solid-State Circuits Society. 5: 45–59. doi:10.1109/OJSSCS.2024.3524493. ISSN 2644-1349.
  4. ^ a b c d e Lacaita, Andrea; Levantino, Salvatore; Samori, Carlo (2007). Integrated frequency synthesizers for wireless systems. Cambridge: Cambridge University Press. pp. 74–101. ISBN 978-0-521-86315-5.
  5. ^ a b c d e Samori, Carlo. "Understanding Phase Noise in LC VCOs: A Key Problem in RF Integrated Circuits". IEEE Solid-State Circuits Magazine. 8 (4): 81–91. doi:10.1109/MSSC.2016.2573979. ISSN 1943-0582.
  6. ^ Leeson, D.B. (1966). "A simple model of feedback oscillator noise spectrum". Proceedings of the IEEE. 54 (2): 329–330. doi:10.1109/PROC.1966.4682. ISSN 0018-9219.
  7. ^ Hajimiri, A.; Lee, T.H. "A general theory of phase noise in electrical oscillators". IEEE Journal of Solid-State Circuits. 33 (2): 179–194. doi:10.1109/4.658619.
  8. ^ Fanori, L.; Andreani, P. "Highly Efficient Class-C CMOS VCOs, Including a Comparison With Class-B VCOs". IEEE Journal of Solid-State Circuits. 48 (7): 1730–1740. doi:10.1109/JSSC.2013.2253402. ISSN 0018-9200.
  9. ^ a b c d Babaie, Masoud; Kuo, Feng-Wei; Chen, Huan-Neng Ron; Cho, Lan-Chou; Jou, Chewn-Pu; Hsueh, Fu-Lung; Shahmohammadi, Mina; Staszewski, Robert Bogdan. "A Fully Integrated Bluetooth Low-Energy Transmitter in 28 nm CMOS With 36% System Efficiency at 3 dBm". IEEE Journal of Solid-State Circuits. 51 (7): 1547–1565. doi:10.1109/JSSC.2016.2551738. ISSN 0018-9200.
  10. ^ a b Lim, Chee Cheow; Ramiah, Harikrishnan; Yin, Jun; Mak, Pui-In; Martins, Rui P. "An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances". IEEE Journal of Solid-State Circuits. 53 (12): 3528–3539. doi:10.1109/JSSC.2018.2875099. ISSN 0018-9200.
  11. ^ Murphy, David; Rael, Jacob J; Abidi, Asad A. "Phase Noise in LC Oscillators: A Phasor-Based Analysis of a General Result and of Loaded $Q$". IEEE Transactions on Circuits and Systems I: Regular Papers. 57 (6): 1187–1203. doi:10.1109/TCSI.2009.2030110. ISSN 1549-8328.
  12. ^ Hegazi, E.; Sjoland, H.; Abidi, A.A. "A filtering technique to lower LC oscillator phase noise". IEEE Journal of Solid-State Circuits. 36 (12): 1921–1930. doi:10.1109/4.972142.
  13. ^ Garampazzi, Marco; Mendes, Paulo M.; Codega, Nicola; Manstretta, Danilo; Castello, Rinaldo. "Analysis and Design of a 195.6 dBc/Hz Peak FoM P-N Class-B Oscillator With Transformer-Based Tail Filtering". IEEE Journal of Solid-State Circuits. 50 (7): 1657–1668. doi:10.1109/JSSC.2015.2413851. ISSN 0018-9200.
  14. ^ Mazzanti, Andrea; Andreani, Pietro. "Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise". IEEE Journal of Solid-State Circuits. 43 (12): 2716–2729. doi:10.1109/JSSC.2008.2004867. ISSN 0018-9200.
  15. ^ Fanori, Luca; Andreani, Pietro. "Class-D CMOS Oscillators". IEEE Journal of Solid-State Circuits. 48 (12): 3105–3119. doi:10.1109/JSSC.2013.2271531. ISSN 0018-9200.
  16. ^ Mazzanti, Andrea; Bevilacqua, Andrea. "On the Phase Noise Performance of Transformer-Based CMOS Differential-Pair Harmonic Oscillators". IEEE Transactions on Circuits and Systems I: Regular Papers. 62 (9): 2334–2341. doi:10.1109/TCSI.2015.2451915. ISSN 1549-8328.
  17. ^ Guo, Hao; Chen, Yong; Mak, Pui-In; Martins, Rui P. "20.1 A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBc/Hz Peak FoM and 90-to-180kHz 1/f 3 PN Corner Without Harmonic Tuning". International Solid-State Circuits Conference (ISSCC). IEEE: 294–296. doi:10.1109/ISSCC42613.2021.9365761. ISBN 978-1-7281-9549-0.
  18. ^ Babaie, Masoud; Staszewski, Robert Bogdan. "A Class-F CMOS Oscillator". IEEE Journal of Solid-State Circuits. 48 (12): 3120–3133. doi:10.1109/JSSC.2013.2273823. ISSN 0018-9200.

Further readings

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  • Lee, T., (December 2003). The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge University Press. ISBN 978-0521835398.
  • A. Franceschin, D. Riccardi and A. Mazzanti, "Ultra-Low Phase Noise X-Band BiCMOS VCOs Leveraging the Series Resonance," in IEEE Journal of Solid-State Circuits, vol. 57, no. 12, pp. 3514-3526, Dec. 2022, doi: 10.1109/JSSC.2022.3202405
  • M. Shahmohammadi, M. Babaie and R. B. Staszewski, "A 1/f Noise Upconversion Reduction Technique for Voltage-Biased RF CMOS Oscillators," in IEEE Journal of Solid-State Circuits, vol. 51, no. 11, pp. 2610-2624, Nov. 2016, doi: 10.1109/JSSC.2016.2602214
  • S. A. -R. Ahmadi-Mehr, M. Tohidian and R. B. Staszewski, "Analysis and Design of a Multi-Core Oscillator for Ultra-Low Phase Noise," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 4, pp. 529-539, April 2016, doi: 10.1109/TCSI.2016.2529218
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