English: Schematic diagram of a simple analog watchdog timer. Electric current i from the current source gradually charges capacitor C, causing voltage Vc to ramp up. In normal operation, periodic "kick" pulses are applied to the kick input. Each kick discharges C. However, if the kicks cease or become spaced too far apart in time, Vc will rise above threshold voltage Vth and the voltage comparator will output a timeout signal.
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